ADC hardware-specific implementation. More...
#include "adc_sam3.h"#include "cfg/cfg_adc.h"#include <cfg/macros.h>#include <cfg/compiler.h>#include <cfg/log.h>#include <drv/adc.h>#include <drv/irq_cm3.h>#include <cpu/irq.h>#include <mware/event.h>#include <io/cm3.h>Go to the source code of this file.
Functions | |
| static | DECLARE_ISR (adc_conversion_end_irq) |
| ADC ISR. | |
| void | adc_hw_select_ch (uint8_t ch) |
| Select mux channel ch. | |
| uint16_t | adc_hw_read (void) |
| Start an ADC convertion. | |
| void | adc_hw_init (void) |
| Init ADC hardware. | |
Detailed Description
ADC hardware-specific implementation.
Definition in file adc_sam3.c.
Function Documentation
| uint16_t adc_hw_read | ( | void | ) |
Start an ADC convertion.
If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.
If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.
Definition at line 100 of file adc_sam3.c.
| void adc_hw_select_ch | ( | uint8_t | ch | ) |
Select mux channel ch.
Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.
Definition at line 89 of file adc_sam3.c.
| static DECLARE_ISR | ( | adc_conversion_end_irq | ) | [static] |
ADC ISR.
The interrupt is connected to ready data, so when the adc ends the conversion we generate an event and then we return the converted value.
- Note:
- to clear the Ready data bit and End of conversion bit we should read the Last Converted Data register, otherwise the ready data interrupt loop on this call.
Definition at line 77 of file adc_sam3.c.
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