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cfg_ser.h File Reference
Configuration file for serial module. More...
Go to the source code of this file.
Defines | |
| #define | CONFIG_UART0_ENABLED 1 |
| Example of setting for serial port and spi port. | |
| #define | CONFIG_UART0_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 0 [bytes]. | |
| #define | CONFIG_UART0_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 0 [bytes]. | |
| #define | CONFIG_UART1_ENABLED 1 |
| Enable port 1. | |
| #define | CONFIG_UART1_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 1 [bytes]. | |
| #define | CONFIG_UART1_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 1 [bytes]. | |
| #define | CONFIG_UART2_ENABLED 1 |
| Enable port 2. | |
| #define | CONFIG_UART2_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 2 [bytes]. | |
| #define | CONFIG_UART2_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 2 [bytes]. | |
| #define | CONFIG_UART3_ENABLED 1 |
| Enable port 3. | |
| #define | CONFIG_UART3_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 3 [bytes]. | |
| #define | CONFIG_UART3_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 3 [bytes]. | |
| #define | CONFIG_UART4_ENABLED 1 |
| Enable port 4. | |
| #define | CONFIG_UART4_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 4 [bytes]. | |
| #define | CONFIG_UART4_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 4 [bytes]. | |
| #define | CONFIG_UART5_ENABLED 1 |
| Enable port 5. | |
| #define | CONFIG_UART5_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 5 [bytes]. | |
| #define | CONFIG_UART5_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 5 [bytes]. | |
| #define | CONFIG_UART6_ENABLED 1 |
| Enable port 6. | |
| #define | CONFIG_UART6_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 6 [bytes]. | |
| #define | CONFIG_UART6_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 6 [bytes]. | |
| #define | CONFIG_UART7_ENABLED 1 |
| Enable port 7. | |
| #define | CONFIG_UART7_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for port 7 [bytes]. | |
| #define | CONFIG_UART7_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for port 7 [bytes]. | |
| #define | CONFIG_SPI_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for SPI port [bytes]. | |
| #define | CONFIG_SPI_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for SPI port [bytes]. | |
| #define | CONFIG_SPI0_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for SPI port 0 [bytes]. | |
| #define | CONFIG_SPI0_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for SPI port 0 [bytes]. | |
| #define | CONFIG_SPI1_TXBUFSIZE 32 |
| Size of the outbound FIFO buffer for SPI port 1 [bytes]. | |
| #define | CONFIG_SPI1_RXBUFSIZE 32 |
| Size of the inbound FIFO buffer for SPI port 1 [bytes]. | |
| #define | CONFIG_SPI_DATA_ORDER SER_MSB_FIRST |
| SPI data order. | |
| #define | CONFIG_SPI_CLOCK_DIV 16 |
| SPI clock division factor. | |
| #define | CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW |
| SPI clock polarity: normal low or normal high. | |
| #define | CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE |
| SPI clock phase you can choose sample on first edge or sample on second clock edge. | |
| #define | CONFIG_SER_TXTIMEOUT -1 |
| Default transmit timeout (ms). | |
| #define | CONFIG_SER_RXTIMEOUT -1 |
| Default receive timeout (ms). | |
| #define | CONFIG_SER_HWHANDSHAKE 0 |
| Use RTS/CTS handshake. | |
| #define | CONFIG_SER_DEFBAUDRATE 0UL |
| Default baudrate for all serial ports (set to 0 to disable). | |
| #define | CONFIG_SER_STROBE 0 |
| Enable strobe pin for debugging serial interrupt. | |
Detailed Description
Configuration file for serial module.
Definition in file cfg_ser.h.
Define Documentation
| #define CONFIG_SER_RXTIMEOUT -1 |
| #define CONFIG_SER_STROBE 0 |
Enable strobe pin for debugging serial interrupt.
This is a debug facility that can be used to monitor SER interrupt activity on an external pin.
To use strobes, redefine the macros SER_STROBE_ON, SER_STROBE_OFF and SER_STROBE_INIT and set CONFIG_SER_STROBE to 1.
| #define CONFIG_SER_TXTIMEOUT -1 |
| #define CONFIG_UART0_ENABLED 1 |
