00001
00038 #ifndef DRV_DMAC_SAM3_H
00039 #define DRV_DMAC_SAM3_H
00040 
00041 #include <cfg/macros.h>
00042
00043 #include <cpu/types.h>
00044 #include <drv/irq_cm3.h>
00045
00046 typedef void (*dmac_handler_t)(uint32_t status);
00047
00051 typedef struct DmacDesc
00052 {
00053     uint32_t src_addr;
00054     uint32_t dst_addr;
00055     uint32_t ctrla;
00056     uint32_t ctrlb;
00057     uint32_t dsc_addr;
00058 } DmacDesc;
00059
00060 typedef struct Dmac
00061 {
00062     DmacDesc lli;
00063     uint8_t errors;
00064     size_t transfer_size;
00065     dmac_handler_t handler;
00066 } Dmac;
00067
00068 #define DMAC_ERR_CH_ALREDY_ON    BV(0)
00069 
00070 void dmac_setLLITransfer(int ch, DmacDesc *lli, uint32_t cfg);
00071 void dmac_setSources(int ch, uint32_t src, uint32_t dst);
00072 void dmac_configureDmac(int ch, size_t transfer_size, uint32_t cfg, uint32_t ctrla, uint32_t ctrlb);
00073 int dmac_start(int ch);
00074 void dmac_stop(int ch);
00075 int dmac_error(int ch);
00076 bool dmac_enableCh(int ch, dmac_handler_t handler);
00077 void dmac_init(void);
00078
00079 #endif /* DRV_DMAC_SAM3_H */