00001
00036 #include "sam3_chipid.h"
00037
00038 #include <cpu/types.h>
00039
00040 static const char _unknown[] = "unknown";
00041 static const char * const chip_id_eproc_names[] =
00042 {
00043     _unknown,                   // 0
00044     "arm946es",                 // 1
00045     "arm7tdmi",                 // 2
00046     "cortex-m3",                // 3
00047     "arm920t",                  // 4
00048     "arm926ejs",                // 5
00049     "cortex-a5",                // 6
00050 };
00051
00052 const char *chipid_eproc_name(int idx)
00053 {
00054     if (idx <= 6)
00055         return chip_id_eproc_names[idx];
00056
00057     return _unknown;
00058 }
00059
00060 #define chip_id_nvpsize2 chip_id_nvpsize        // these two tables are identical
00061 static const char * const chip_id_nvpsize[] =
00062 {
00063     "none",                     //  0
00064     "8K bytes",                 //  1
00065     "16K bytes",                //  2
00066     "32K bytes",                //  3
00067     _unknown,                   //  4
00068     "64K bytes",                //  5
00069     _unknown,                   //  6
00070     "128K bytes",               //  7
00071     _unknown,                   //  8
00072     "256K bytes",               //  9
00073     "512K bytes",               // 10
00074     _unknown,                   // 11
00075     "1024K bytes",              // 12
00076     _unknown,                   // 13
00077     "2048K bytes",              // 14
00078     _unknown,                   // 15
00079 };
00080
00081 const char *chipid_nvpsize(int idx)
00082 {
00083     if (idx <= 15)
00084         return chip_id_nvpsize[idx];
00085
00086     return _unknown;
00087 }
00088
00089
00090 static const char * const chip_id_sramsize[] =
00091 {
00092     "48K Bytes",                //  0
00093     "1K Bytes",                 //  1
00094     "2K Bytes",                 //  2
00095     "6K Bytes",                 //  3
00096     "112K Bytes",               //  4
00097     "4K Bytes",                 //  5
00098     "80K Bytes",                //  6
00099     "160K Bytes",               //  7
00100     "8K Bytes",                 //  8
00101     "16K Bytes",                //  9
00102     "32K Bytes",                // 10
00103     "64K Bytes",                // 11
00104     "128K Bytes",               // 12
00105     "256K Bytes",               // 13
00106     "96K Bytes",                // 14
00107     "512K Bytes",               // 15
00108
00109 };
00110
00111 const char *chipid_sramsize(int idx)
00112 {
00113     if (idx <= 15)
00114         return chip_id_sramsize[idx];
00115
00116     return _unknown;
00117 }
00118
00119
00120 static const struct archnames { unsigned value; const char *name; } chip_id_archnames[] =
00121 {
00122     { 0x19,  "AT91SAM9xx Series"                        },
00123     { 0x29,  "AT91SAM9XExx Series"                      },
00124     { 0x34,  "AT91x34 Series"                           },
00125     { 0x37,  "CAP7 Series"                              },
00126     { 0x39,  "CAP9 Series"                              },
00127     { 0x3B,  "CAP11 Series"                             },
00128     { 0x40,  "AT91x40 Series"                           },
00129     { 0x42,  "AT91x42 Series"                           },
00130     { 0x55,  "AT91x55 Series"                           },
00131     { 0x60,  "AT91SAM7Axx Series"                       },
00132     { 0x61,  "AT91SAM7AQxx Series"                      },
00133     { 0x63,  "AT91x63 Series"                           },
00134     { 0x70,  "AT91SAM7Sxx Series"                       },
00135     { 0x71,  "AT91SAM7XCxx Series"                      },
00136     { 0x72,  "AT91SAM7SExx Series"                      },
00137     { 0x73,  "AT91SAM7Lxx Series"                       },
00138     { 0x75,  "AT91SAM7Xxx Series"                       },
00139     { 0x76,  "AT91SAM7SLxx Series"                      },
00140     { 0x80,  "ATSAM3UxC Series (100-pin version)"       },
00141     { 0x81,  "ATSAM3UxE Series (144-pin version)"       },
00142     { 0x83,  "ATSAM3AxC Series (100-pin version)"       },
00143     { 0x84,  "ATSAM3XxC Series (100-pin version)"       },
00144     { 0x85,  "ATSAM3XxE Series (144-pin version)"       },
00145     { 0x86,  "ATSAM3XxG Series (208/217-pin version)"   },
00146     { 0x88,  "ATSAM3SxA Series (48-pin version)"        },
00147     { 0x89,  "ATSAM3SxB Series (64-pin version)"        },
00148     { 0x8A,  "ATSAM3SxC Series (100-pin version)"       },
00149     { 0x92,  "AT91x92 Series"                           },
00150     { 0x95,  "ATSAM3NxC Series (100-pin version)"       },
00151     { 0xF0,  "AT75Cxx Series"                           },
00152     { -1, NULL },
00153
00154 };
00155
00156 const char *chipid_archnames(unsigned value)
00157 {
00158     for (int i = 0; chip_id_archnames[i].name; i++)
00159     {
00160         if (chip_id_archnames[i].value == value)
00161             return chip_id_archnames[i].name;
00162     }
00163
00164     return _unknown;
00165 }
00166
00167 static const char * const chip_id_nvptype[] = {
00168     "rom", // 0
00169     "romless or onchip flash", // 1
00170     "embedded flash memory", // 2
00171     "rom(nvpsiz) + embedded flash (nvpsiz2)", //3
00172     "sram emulating flash", // 4
00173 };
00174
00175 const char *chipid_nvptype(int idx)
00176 {
00177     if (idx <= 4)
00178         return chip_id_nvptype[idx];
00179
00180     return _unknown;
00181 }
00182