ser_xmega.h
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00001 00044 #ifndef DRV_SER_XMEGA_H 00045 #define DRV_SER_XMEGA_H 00046 00047 #include <cfg/macros.h> /* BV() */ 00048 #include <cfg/compiler.h> /* uint8_t */ 00049 #include "cfg/cfg_ser.h" /* Serialport configuration settings */ 00050 00051 typedef uint8_t serstatus_t; 00052 00053 /* Software errors */ 00054 #define SERRF_RXFIFOOVERRUN BV(0) 00055 #define SERRF_RXTIMEOUT BV(5) 00056 #define SERRF_TXTIMEOUT BV(6) 00058 /* 00059 * Hardware errors. 00060 * These flags map directly to the AVR XMEGA UART Status Register. 00061 */ 00062 #define SERRF_RXSROVERRUN BV(3) 00063 #define SERRF_FRAMEERROR BV(4) 00064 #define SERRF_PARITYERROR BV(2) 00065 #define SERRF_NOISEERROR 0 00067 /* 00068 * XMEGA_D4 has 2 serial ports 00069 * XMEGA_D3 has 3 serial ports 00070 * XMEGA_A4 has 5 serial ports 00071 * XMEGA_A3 has 7 serial ports 00072 * XMEGA_A1 has 8 serial ports 00073 * 00074 * These serial ports can be enabled or disabled in the cfg_ser.h file 00075 * Generate definitions whether a serial port needs to be implementend by 00076 * the driver, depending on the type of XMega and the settings in cfg_ser.h 00077 */ 00078 #if CONFIG_UART0_ENABLED 00079 #define IMPLEMENT_SER_UART0 1 00080 #else 00081 #define IMPLEMENT_SER_UART0 0 00082 #endif 00083 #if CONFIG_UART1_ENABLED 00084 #define IMPLEMENT_SER_UART1 1 00085 #else 00086 #define IMPLEMENT_SER_UART1 0 00087 #endif 00088 #if (CPU_AVR_XMEGA_D3 || CPU_AVR_XMEGA_A4 || CPU_AVR_XMEGA_A3 || CPU_AVR_XMEGA_A1) && CONFIG_UART2_ENABLED 00089 #define IMPLEMENT_SER_UART2 1 00090 #else 00091 #define IMPLEMENT_SER_UART2 0 00092 #endif 00093 #if CPU_AVR_XMEGA_A4 || CPU_AVR_XMEGA_A3 || CPU_AVR_XMEGA_A1 00094 #if CONFIG_UART3_ENABLED 00095 #define IMPLEMENT_SER_UART3 1 00096 #else 00097 #define IMPLEMENT_SER_UART3 0 00098 #endif 00099 #if CONFIG_UART4_ENABLED 00100 #define IMPLEMENT_SER_UART4 1 00101 #else 00102 #define IMPLEMENT_SER_UART4 0 00103 #endif 00104 #else 00105 #define IMPLEMENT_SER_UART3 0 00106 #define IMPLEMENT_SER_UART4 0 00107 #endif 00108 #if CPU_AVR_XMEGA_A3 || CPU_AVR_XMEGA_A1 00109 #if CONFIG_UART5_ENABLED 00110 #define IMPLEMENT_SER_UART5 1 00111 #else 00112 #define IMPLEMENT_SER_UART5 0 00113 #endif 00114 #if CONFIG_UART6_ENABLED 00115 #define IMPLEMENT_SER_UART6 1 00116 #else 00117 #define IMPLEMENT_SER_UART6 0 00118 #endif 00119 #else 00120 #define IMPLEMENT_SER_UART5 0 00121 #define IMPLEMENT_SER_UART6 0 00122 #endif 00123 #if CPU_AVR_XMEGA_A1 && CONFIG_UART7_ENABLED 00124 #define IMPLEMENT_SER_UART7 1 00125 #else 00126 #define IMPLEMENT_SER_UART7 0 00127 #endif 00128 00129 /* 00130 * 00131 * \name Serial hw numbers 00132 * 00133 * \{ 00134 */ 00135 enum 00136 { 00137 #if IMPLEMENT_SER_UART0 00138 SER_UART0, 00139 #endif 00140 #if IMPLEMENT_SER_UART1 00141 SER_UART1, 00142 #endif 00143 #if IMPLEMENT_SER_UART2 00144 SER_UART2, 00145 #endif 00146 #if IMPLEMENT_SER_UART3 00147 SER_UART3, 00148 #endif 00149 #if IMPLEMENT_SER_UART4 00150 SER_UART4, 00151 #endif 00152 #if IMPLEMENT_SER_UART5 00153 SER_UART5, 00154 #endif 00155 #if IMPLEMENT_SER_UART6 00156 SER_UART6, 00157 #endif 00158 #if IMPLEMENT_SER_UART7 00159 SER_UART7, 00160 #endif 00161 SER_CNT 00162 }; 00163 /*\}*/ 00164 00165 #endif /* DRV_SER_XMEGA_H */
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