00001
00042 #ifndef DRV_TIMER_MEGA_H
00043 #define DRV_TIMER_MEGA_H
00044 
00045 #include <hw/hw_cpufreq.h>   /* CPU_FREQ */
00046
00047 #include "cfg/cfg_timer.h"   /* CONFIG_TIMER */
00048 #include <cfg/compiler.h>    /* uint8_t */
00049 #include <cfg/macros.h>      /* DIV_ROUND */
00050
00051 #include <avr/io.h>
00052 #include <avr/interrupt.h>
00053
00061 #define TIMER_ON_OUTPUT_COMPARE0  1
00062 #define TIMER_ON_OVERFLOW1        2
00063 #define TIMER_ON_OUTPUT_COMPARE2  3
00064 #define TIMER_ON_OVERFLOW3        4
00065 
00066 #define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer
00067 
00068 /*
00069  * Hardware dependent timer initialization.
00070  */
00071 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
00072 
00073     #define TIMER_PRESCALER      64
00074     #define TIMER_HW_BITS        8
00075     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 \
00076         || CPU_AVR_ATMEGA88P || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P \
00077         || CPU_AVR_ATMEGA324P || CPU_AVR_ATMEGA644P
00078         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect)
00079     #else
00080         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect)
00081     #endif
00082     #define TIMER_TICKS_PER_SEC  1000
00083     #define TIMER_HW_CNT         OCR_DIVISOR
00084 
00086     typedef uint8_t hptime_t;
00087     #define SIZEOF_HPTIME_T 1
00088 
00089     INLINE hptime_t timer_hw_hpread(void)
00090     {
00091         return TCNT0;
00092     }
00093
00094 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
00095 
00096     #define TIMER_PRESCALER      1
00097     #define TIMER_HW_BITS        8
00098 
00099     #define TIMER_HW_CNT         (1 << TIMER_HW_BITS)
00100     #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER1_OVF_vect)
00101     #define TIMER_TICKS_PER_SEC  DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT)
00102 
00104     typedef uint16_t hptime_t;
00105     #define SIZEOF_HPTIME_T 2
00106 
00107     INLINE hptime_t timer_hw_hpread(void)
00108     {
00109         return TCNT1;
00110     }
00111
00112 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
00113 
00114     #define TIMER_PRESCALER      64
00115     #define TIMER_HW_BITS        8
00116 
00117     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 \
00118         || CPU_AVR_ATMEGA88P || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P \
00119         || CPU_AVR_ATMEGA324P || CPU_AVR_ATMEGA644P
00120         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect)
00121     #else
00122         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect)
00123     #endif
00124     #define TIMER_TICKS_PER_SEC  1000
00125 
00126     #define TIMER_HW_CNT         OCR_DIVISOR
00127 
00129     typedef uint8_t hptime_t;
00130     #define SIZEOF_HPTIME_T 1
00131 
00132     INLINE hptime_t timer_hw_hpread(void)
00133     {
00134         return TCNT2;
00135     }
00136
00137 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
00138 
00139     #define TIMER_PRESCALER      1
00140     #define TIMER_HW_BITS        8
00141 
00142     #define TIMER_HW_CNT         (1 << TIMER_HW_BITS)
00143     #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER3_OVF_vect)
00144     #define TIMER_TICKS_PER_SEC  DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT)
00145 
00147     typedef uint16_t hptime_t;
00148     #define SIZEOF_HPTIME_T 2
00149 
00150     INLINE hptime_t timer_hw_hpread(void)
00151     {
00152         return TCNT3;
00153     }
00154
00155 #else
00156 
00157     #error Unimplemented value for CONFIG_TIMER
00158 #endif /* CONFIG_TIMER */
00159
00160
00162 #define TIMER_HW_HPTICKS_PER_SEC  DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)
00163 
00168 #define OCR_DIVISOR  (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1)
00169 
00171 #define timer_hw_irq() do {} while (0)
00172 
00174 #define timer_hw_triggered() (true)
00175 
00176 void timer_hw_init(void);
00177
00178 #endif /* DRV_TIMER_MEGA_H */