00001
00044 #ifndef DRV_WM8731_H
00045 #define DRV_WM8731_H
00046 
00047 #include <cpu/types.h>
00048
00049 #include <drv/i2c.h>
00050
00051 /* Reset register*/
00052 #define WM8731_REG_RESET                           0x0F
00053 
00054 /* Left Line in register */
00055 #define WM8731_REG_LEFT_LINEIN                     0x0
00056 #define WM8731_LINVOL_BITS_MASK                   0x1F // Left line input volume control
00057 #define WM8731_LINMUTE_BIT                           7 // Left line input mute to ADC
00058 #define WM8731_LRINBOTH_BIT                          8 // Left to right channel line input volume and mute data load control
00059 
00060 /* Right Line in register */
00061 #define WM8731_REG_RIGHT_LINEIN                    0x1
00062 #define WM8731_RINVOL_BITS_MASK                   0x1F // Right line input volume control
00063 #define WM8731_RINMUTE_BIT                           7 // Right line input mute to ADC
00064 #define WM8731_RLINBOTH_BIT                          8 // Right to right channel line input volume and mute data load control
00065 
00066 /* Left Headphone out register*/
00067 #define WM8731_REG_LEFT_HPOUT                      0x2
00068 #define WM8731_LHPVOL_BITS_MASK                   0x7F // Left channel headphone output volume control
00069 #define WM8731_LZCEN_BIT                             7 // Left channel zero cross detect enable
00070 #define WM8731_LRHPBOTH_BIT                          8 // Left to right channel headphone volume, mute and zero cross data load control
00071 
00072 /* Right Headphone out register*/
00073 #define WM8731_REG_RIGHT_HPOUT                      0x3
00074 #define WM8731_RHPVOL_BITS_MASK                    0x7F // Right channel headphone output volume control
00075 #define WM8731_RZCEN_BIT                              7 // Right channel zero cross detect enable
00076 #define WM8731_RLHPBOTH_BIT                           8 // Right to right channel headphone volume, mute and zero cross data load control
00077 
00078 /* Analogue audio path control register*/
00079 #define WM8731_REG_ANALOGUE_PATH_CTRL              0x4
00080 #define WM8731_MICBOOST                              0 // Microphone Input Level Boost
00081 #define WM8731_MUTEMIC                               1 // Line input Mute to ADC
00082 
00086 #define WM8731_INSEL                                 2 // Microphone/Line Select to ADC
00087 #define WM8731_INSEL_MIC              BV(WM8731_INSEL) // Microphone Select to ADC
00088 #define WM8731_INSEL_LINEIN          ~BV(WM8731_INSEL) // Line in Select to ADC
00089 
00093 #define WM8731_BYPASS                            BV(3) // Bypass switch
00094 #define WM8731_DACSEL                            BV(4) // DAC select
00095 #define WM8731_SIDETONE                          BV(5) // Side tone switch
00096 
00100 #define WM8731_SIDEATT_MASK                       0xC0 // Side tone attenuation
00101 #define WM8731_SIDEATT_15dB                       0xC0 // -15dB
00102 #define WM8731_SIDEATT_12dB                       0x80 // -12dB
00103 #define WM8731_SIDEATT_9dB                        0x40 // -9dB
00104 #define WM8731_SIDEATT_6dB                        0x00 // -6dB
00105 
00106
00107 /* Digital audio path control register*/
00108 #define WM8731_REG_DIGITAL_PATH_CTRL               0x5
00109 #define WM8731_ADCHPD                                0 // ADC high pass filter enable
00110 
00114 #define WM8731_DEEMP_MASK                          0x6 // De-emphasis control
00115 #define WM8731_DEEMP_48kHz                         0x6 // 48kHz
00116 #define WM8731_DEEMP_44k1Hz                        0x4 // 44.1kHz
00117 #define WM8731_DEEMP_32kHz                         0x2 // 32kHz
00118 #define WM8731_DEEMP_DISABLE                       0x0 // Disable
00119 #define WM8731_DACMU                                 3 // DAC Soft Mute control
00120 
00121 /* Power down control register*/
00122 #define WM8731_REG_PWDOWN_CTRL                     0x6
00123 #define WM8731_LINEINPD                           BV(0) ///< LineIn power down
00124 #define WM8731_MICPD                              BV(1) ///< Mic power down
00125 #define WM8731_ADCPD                              BV(2) ///< ADC power down
00126 #define WM8731_DACPD                              BV(3) ///< DAC power down
00127 #define WM8731_OUTPD                              BV(4) ///< OUT power down
00128 #define WM8731_OSCBIT                             BV(5) ///< OSC power down
00129 #define WM8731_CLKOUTPD                           BV(6) ///< CLKOUT powerdown
00130 #define WM8731_POWEROFF_BIT                          7 // Power off device
00131 
00132 /* Interface format register*/
00133 #define WM8731_REG_DA_INTERFACE_FORMAT             0x7
00134 
00138 #define WM8731_FORMAT_BITS_MASK                    0x3 // Format
00139 #define WM8731_FORMAT_MSB_LEFT_JUSTIFIED           0x0 // MSB-First, left justified
00140 #define WM8731_FORMAT_MSB_RIGHT_JUSTIFIED          0x1 // MSB-First, right justified
00141 #define WM8731_FORMAT_I2S                          0x2 //I2S Format, MSB-First left-1 justified
00142 #define WM8731_FORMAT_DSP                          0x3 //DSP Mode, frame sync + 2 data packed words
00143 
00147 #define WM8731_IWL_BITS                            0xC // Input audio data bit length select
00148 #define WM8731_IWL_16_BIT                          0x0 // 16 bit
00149 #define WM8731_IWL_20_BIT                          0x4 // 20 bit
00150 #define WM8731_IWL_24_BIT                          0x8 // 24 bit
00151 #define WM8731_IWL_32_BIT                          0xC // 32 bit
00152 #define WM8731_IRP_BITS                              4 //  DACLRC phase control
00153 #define WM8731_IRSWAP_BIT                            5 //  DAC Left right clock swap
00154 #define WM8731_MS_BIT                                6 //  Master slave mode control
00155 #define WM8731_BCLKINV_BIT                           7 // Bit clock invert
00156 
00157 /* Sampling control*/
00158 #define WM8731_REG_SAMPLECTRL                      0x8
00159 #define WM8731_USBNORMAL_BIT                         0 // Mode select, usb mode, normal mode
00160 #define WM8731_BOSR_BIT                              1 // Base over-sampling rate
00161 #define WM8731_SR_BITS_MASK                       0x3C // Sample rate control
00162 #define WM8731_CLKIDIV2_BIT                          6 // Core clock divider select
00163 #define WM8731_CLKODIV2_BIT                          7 // CLKOUT divider select
00164 
00168 #define WM8731_NORMAL_256FS_48KHZ      0
00169 #define WM8731_NORMAL_256FS_44_1KHZ    0x20
00170 #define WM8731_NORMAL_384FS_44_1KHZ    0x22
00171 #define WM8731_NORMAL_128FS_44_1KHZ    0x3E
00172 
00173 /* Active control register*/
00174 #define WM8731_REG_ACTIVE_CTRL                     0x9
00175 #define WM8731_ACTIVE_BIT                            0 // Activate interface
00176 
00177
00178 typedef struct Wm8731
00179 {
00180     I2c *i2c;
00181     uint8_t addr;
00182 } Wm8731;
00183
00184
00189 #define     WM8731_LINE_IN        BV(0)
00190 #define     WM8731_HEADPHONE      BV(1)
00191 /* \} */
00192
00197 void wm8731_setVolume(Wm8731 *ctx, uint16_t device, uint8_t volume);
00198 void wm8731_powerOn(Wm8731 *ctx);
00199 void wm8731_powerOff(Wm8731 *ctx);
00200 void wm8731_powerOnDevices(Wm8731 *ctx, uint16_t device);
00201 void wm8731_powerOffDevices(Wm8731 *ctx, uint16_t device);
00202
00203 void wm8731_init(Wm8731 *ctx, I2c *i2c, uint8_t codec_addr);
00204
00205 #endif /* DRV_WM8731_H */